Plenary and invited Speakers

Last update: May 18, 2018

Plenary Speakers
"Evolution of the GPU Device leading the AI and Parallel Processing Computing"
Toru Baji (NVIDIA)

Following Moore’s Law, GPU got a big performance advantage over CPU. From this reason, GPU is now widely used not only for graphics but also for massive parallel processing and AI. In this paper, GPU device evolution, advanced CoWoS packaging with HBM2 and some of its key applications like AI and Autonomous Driving will be introduced.

"Opportunities for Si Photonics in Next-Generation Data Centers"
Clint Schow (University of California, Santa Barbara)

Data centers are driving the development of next-generation optical interconnect technologies that must achieve higher performance at lower cost and power under shorter and shorter development cycles. In addition to satisfying the never-ending demand for higher speed point-to-point links, all-photonic switching/routing technologies and hybrid networks combining electrical and optical switching are under worldwide investigation as a means to enable new network architectures. Si photonics has the potential to enable many of these functions by offering a path to the high integration level needed to implement low-cost WDM platforms and large-scale photonic switches.
This talk will provide background on the current state of optical interconnects in data centers and will highlight opportunities for Si photonics technology in future networks. A common theme will be the need to cost-effectively integrate large-scale photonics with electronics in next generation packages. This will require a new design paradigm where photonic and electronic components cannot be compartmentalized and considered separately, but rather must be holistically co-designed. Achieving such electronic/photonic convergence will deliver significant dividends by maximizing efficiency and performance, but raises a host of challenges and risks that provide fertile ground for research and innovation.

"Short Reach Optical Technologies to enable progress towards Self-Awareness"
Daniel Kuchta (IBM T. J. Watson Research Center)

The Singularity, as described by Kurzweil, is predicted to occur, if at all, by the year 2045. If High Performance Computing (HPC) technology continues on it’s current pace of 10x improvement in performance every 4 years then by 2045 this would imply a performance level of 1E+24 Flops/s = 1 Million Exaflops = 100Zetaflops. But the Singularity may occur sooner than 2045 as some HPC systems have already exceeded the computing capacity of the human brain, estimated to be ~50 Petaflops. Along the path to the Singularity is a condition (albeit fiercely debated) known as Self-Awareness, the ability of an artificial intelligence machine to know of its existence. It is likely that the first Self-Aware systems will use optical interconnect for a substantial portion of its external data movement. This talk will focus on the existing and upcoming technologies and packaging for short reach optical interconnect, and it will attempt to identify the necessary interconnect developments that will propel HPC and Data Centers towards achieving Self-Awareness.

"New Packaging Alternatives via high bandwidth and low power USR SerDes"
Amin Shokrollahi (Kandou BUS)

Massive integration of IC components on a chip has been the primary catalyst for the development of high performance Systems on Chip (SoC). Today, SoC’s contain a multitude of components besides the logic core that makes up the main functionality. Integration of these components is fast becoming the major bottleneck in the design and development of SoC’s. Verification alone can take up to 70% of the design time, especially when high speed analog components have to be integrated alongside digital ones. The tide is therefore changing in the industry, with disintegration gaining more traction.
“Chiplets”, or stand alone die with defined functions in heterogenous processes, can be packaged together to create a disintegrated SoC. To allow maximum flexibility in terms of die placement and heterogeneity, as well as lowest packaging costs, ultra-short-reach (USR) SerDes can be used to connect chiplets in a standard MCM. For such SerDes to be competitive, it needs to have extremely high bandwidth, and be of lowest possible power.
In this talk I will introduce such a SerDes family, called “Glasswing,” discuss some of the theory behind its development, and outline today’s and future applications.


Singularity Special Speaker

Shintaro Yamamichi (IBM Research - Tokyo)



EPS Special Speaker

Chris Bailey (University of Greenwich)



EPS Lecture Event Speaker

Mudasir Ahmad (Cisco Systems, Inc. San Jose)




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