Plenary and invited Speakers

Last update: October 19, 2018

Plenary Speakers
"Evolution of the GPU Device leading the AI and Parallel Processing Computing"
Toru Baji (NVIDIA)

Following Moore’s Law, GPU got a big performance advantage over CPU. From this reason, GPU is now widely used not only for graphics but also for massive parallel processing and AI. In this paper, GPU device evolution, advanced CoWoS packaging with HBM2 and some of its key applications like AI and Autonomous Driving will be introduced.

"Opportunities for Si Photonics in Next-Generation Data Centers"
Clint Schow (University of California, Santa Barbara)

Data centers are driving the development of next-generation optical interconnect technologies that must achieve higher performance at lower cost and power under shorter and shorter development cycles. In addition to satisfying the never-ending demand for higher speed point-to-point links, all-photonic switching/routing technologies and hybrid networks combining electrical and optical switching are under worldwide investigation as a means to enable new network architectures. Si photonics has the potential to enable many of these functions by offering a path to the high integration level needed to implement low-cost WDM platforms and large-scale photonic switches.
This talk will provide background on the current state of optical interconnects in data centers and will highlight opportunities for Si photonics technology in future networks. A common theme will be the need to cost-effectively integrate large-scale photonics with electronics in next generation packages. This will require a new design paradigm where photonic and electronic components cannot be compartmentalized and considered separately, but rather must be holistically co-designed. Achieving such electronic/photonic convergence will deliver significant dividends by maximizing efficiency and performance, but raises a host of challenges and risks that provide fertile ground for research and innovation.

"Short Reach Optical Technologies to enable progress towards Self-Awareness"
Daniel Kuchta (IBM T. J. Watson Research Center)

The Singularity, as described by Kurzweil, is predicted to occur, if at all, by the year 2045. If High Performance Computing (HPC) technology continues on it’s current pace of 10x improvement in performance every 4 years then by 2045 this would imply a performance level of 1E+24 Flops/s = 1 Million Exaflops = 100Zetaflops. But the Singularity may occur sooner than 2045 as some HPC systems have already exceeded the computing capacity of the human brain, estimated to be ~50 Petaflops. Along the path to the Singularity is a condition (albeit fiercely debated) known as Self-Awareness, the ability of an artificial intelligence machine to know of its existence. It is likely that the first Self-Aware systems will use optical interconnect for a substantial portion of its external data movement. This talk will focus on the existing and upcoming technologies and packaging for short reach optical interconnect, and it will attempt to identify the necessary interconnect developments that will propel HPC and Data Centers towards achieving Self-Awareness.

"New Packaging Alternatives via high bandwidth and low power USR SerDes"
Amin Shokrollahi (Kandou BUS)

Massive integration of IC components on a chip has been the primary catalyst for the development of high performance Systems on Chip (SoC). Today, SoC’s contain a multitude of components besides the logic core that makes up the main functionality. Integration of these components is fast becoming the major bottleneck in the design and development of SoC’s. Verification alone can take up to 70% of the design time, especially when high speed analog components have to be integrated alongside digital ones. The tide is therefore changing in the industry, with disintegration gaining more traction.
“Chiplets”, or stand alone die with defined functions in heterogenous processes, can be packaged together to create a disintegrated SoC. To allow maximum flexibility in terms of die placement and heterogeneity, as well as lowest packaging costs, ultra-short-reach (USR) SerDes can be used to connect chiplets in a standard MCM. For such SerDes to be competitive, it needs to have extremely high bandwidth, and be of lowest possible power.
In this talk I will introduce such a SerDes family, called “Glasswing,” discuss some of the theory behind its development, and outline today’s and future applications.


Singularity Special Speaker
"Impact of Computing Reimagined on Electronics Packaging"
Shintaro Yamamichi (IBM Research - Tokyo)

A huge transformation from transaction-based computing to data-centric computing will affect the electronics packaging industry with several aspects. New algorithms based on artificial intelligence (AI) accelerate new material discoveries for packaging structures. New applications toward the IoT society require completely new packaging process to fabricate very tiny computers. This talk covers both computational material discovery research and concept of tiny computers within 1mm2 footprint. Traditionally, the new material discovery, not only in the electronics packaging but also every industry, has been achieved by deep insights of excellent experts and lots of try and error experiments. However, recent AI engines enable the hints of new materials, which human being cannot find out, to be extracted from huge amount of big data of technical papers and patents. Moreover, a new algorithm is reported to create completely new material structures having the required properties from relatively small amount of data sets. The unique point of this approach is the inverse calculation to create a new material property, based on the feature extraction from the material characteristics. Another impact of new computing is the demand for the tiny computer as the edge computing. A prototype composed of CPU, memory, communication and battery is fabricated with the 2.5D packaging technology. This tiny computer has an authentic engine for the security use, expected to be used in the blockchain.


Advanced PKG Special Speaker
"New Heterogeneous Integrated SiP Technology and Challenges"
CP Hung (ASE Inc.)

System in Package (SiP) provides the user the great promise to optimize and differentiate their products to meet their device / system requirements. This talk will review innovations in SiP technologies – Embedded, Flip-Chip, Fan-Out, 2.5D and related design challenges, describing how these promises are fulfilled in achieving higher bandwidth, small form factor, with increased functionality and mixed wafer nodes, so very important in the IoT, mobile, big data and AI applications.

"Implementation of Chip Level Micro-bumping and Re-distribution by Additive Manufacturing"
S.W. Ricky Lee (Hong Kong University of Science & Technology)

Micro-bumping and re-distribution layer (RDL) have been two of the major enabling technologies for wafer level packaging. With such enabling technologies, the interconnection of ICs may be re-defined for miniaturization and integration. Currently the fabrication of micro-bumps and RDL are done by full area metallization/dielectric deposition and patterned by photolithography. This method can only be implemented on the whole wafer. During the development stage, microelectronics companies usually have to adopt individual chips from foundries through a multi-project wafer scheme. Consequently, it is very difficult to re-distribute I/Os on the received chips using photolithography. As a result, people have to run re-distribution at the substrate or board level, leading to the sacrifice in electrical performance and footprint. This presentation proposes an alternative approach for implementing MB and RDL by additive manufacturing (AM) at the chip level. Conductive ink is printed on the chip or a fraction of the wafer to form RDL. Micro-bumping is performed by jetting of polymer followed by surface metallization. The present method is different from the previous studies on printed electronics which were mostly at the substrate or board level. The specifications of chip level interconnection should be much higher. Since the AM approach does not require photolithography, it will reduce the fabrication cost, shorten the processing time, and increase the design flexibility. All these are essential merits for effective rapid prototyping.


EPS Special Speaker
"3D-Printing for Electronics Packaging – Current Status and Future Challenges"
Chris Bailey (University of Greenwich)

3D printing (or Additive Manufacturing) technologies offer the possibility to fabricate parts and products in a cost-effective, high-throughput, mass-customisation and energy efficient manner across a diverse range of applications. It has seen significant growth in the last five years and is now being investigated and adopted by a number of electronics systems companies to both design prototypes and use these technologies within a digital manufacturing context. This presentation will detail the key challenges in adopting 3D-Printing in electronics manufacturing and in particular detail the challenges for the design and modelling community.

"Networking: The backbone of IoT, Edge Computing and Artificial Intelligence"
Mudasir Ahmad (Cisco Systems, Inc. San Jose)

Advanced Networking Technology has been the key driver of internet traffic over the past two decades. It has spearheaded the prevalence of smartphones, big data, voice and video. Networking is now driving the exponential growth of Internet of Things (IoT) – more devices and machines connected to each other and the internet. Key to delivering the IoT ecosystem is Edge Computing. As more devices are connected to each other, the latency and bandwidth of the connections between the devices becomes a critical bottleneck. Edge computing strives to balance the need for faster connectivity with the cost, resilience and scalability challenges of hyper connected devices. In addition to enabling IoT, Networking is also driving the incorporation of Artificial Intelligence (AI) into IoT devices and in the network itself. AI is helping networks connect, repair and defend themselves, ensuring speed, scalability and security. In this talk, the key trends and challenges in Networking as they relate to IoT, Edge Computing and Artificial Intelligence will be presented. Moreover, the challenges for advanced packaging in Networking Applications, IoT, Edge Computing and Artificial Intelligence will be outlined.


Invited Speakers
"400G Multi-Mode and Single-Mode Optical Transmitter Realized by Hybrid-Integrated Silicon Interposer for Data Center Application"
Hsiao-Chin Lan (Centera Photonics Incorporated)
"Thin glass based photonic and electronic assemblies"
Gunnar Böttger (Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration (IZM))
"High-Speed Optical Devices for Data Center Networks"
Shigehisa Tanaka (Oclaro, Inc.)
"Ultra-broadband hybrid polymer/sol-gel waveguide modulators"
Yasufumi Enami (Kochi University of Technology)
Advanced Packaging:
"Material and Process to Enhance High Density Circuitry of the Package"
Kazuyuki Mitsukura (Hitachi Chemical)
"Improvement of joint reliability for 3D and power IC packaging by nanomechanical property optimization of intermetallic compounds"
Jenn-Ming Song (National Chung Hsing University)
"Power Consumption Issue at Data Center in the era of AI/IoT"
Yasumitsu Orii (NAGASE & CO., LTD.)
"New concept 3D FOWLP Proposal"
Shuzo Akejima (Rising Technologies Co.,Ltd)
"Development of novel fine line 2.1 D package with organic interposer using advanced substrate-based process"
Wei-Chung Chen (ASE Inc.)
"Comparative Study on Mechanical and Thermal Performance of eWLB, M-Series™ and Fan-out Chip Last Packages"
Meng-kai Shih (ASE Inc.)
"2.5D Like High Density Organic Interposer for Heterogeneous Integration"
Kiyoshi Oi (Shinko Electric Industries Co., Ltd.)
"Low power AI hardware platform for deep learning in edge computing"
Eisaku Ohbuchi (DMP Inc.)
"2.4 GHz Slot Antenna Integrated in Small Shielded Module"
Keiju Yamada (Toshiba)
"Made to Order Half-Inch Packaging Technology Using Minimal Fab Process Tools"
Fumito Imura (National Institute of Advanced Industrial Science and Technology (AIST))
"Development of "smart cell" construction platform for next-generation microbial breeding"
Tomohisa Hasunuma (Kobe University)
Power Electronics:
"Estimation of residual common mode voltage in floating voltage measurement with differential voltage probe for high voltage power electroincs circuit"
Tsuyoshi Funaki (Osaka University)
"Development of Corundum-Structured Gallium Oxide Power Devices by MIST EPITAXY®"
Takashi Shinohe (FLOSFIA Inc.)
"Phase-change thermal management solutions for advanced electronics: two-phase jet impingement technologies"
Matthew Rau (The Pennsylvania State University)


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