Plenary and invited Speakers

Last update: March 11, 2019

Plenary Speakers
"Novel crystalline and amorphous semiconductors"
Hideo Hosono (Tokyo Institute of Technology)
"Photonic Integrated Circuits from Research to Manufacturing"
Peter O'Brien (Tyndall National Institute)

  Integrated Photonics or Photonic Integrated Circuits (PICs) combine multiple optical and electronic functions onto a single semiconductor chip, shrinking footprint and cost significantly. PIC technologies enable new applications such as high-speed communications, medical and point-of-care diagnostics, sensors for automotive such as LIDAR and the Internet of Things. There have been significant developments to realise cost-effective PIC device fabrication processes, but there now exists a manufacturing bottleneck associated with device packaging which is impeding the growth of these markets. This talk will give an overview of photonic and electronic packaging technologies developed at Tyndall and its global collaboration partners, and how these technologies are now being brought to commercialisation through a large-scale Pilot Line funded by the European Commission. The Pilot Line provides users with a wide range of advanced photonic and electronic packaging technologies, with the ability to scale manufacturing to medium volumes. The Pilot Line is strongly focused on offering standardised packaging technologies, and is working with its global partners to establish a detailed set of packaging design rules and technology roadmaps. The talk will also give examples of how photonic packaging technologies are enabling user concepts addressing a wide range of markets to be prototyped and brought to production.

"2D-materials spread heat at nanoscales"
Sebastian Volz (LIMMS/CNRS-IIS (France))

  Thermal transport becomes less efficient as structures scale down since phonon-boundary scattering becomes predominant, therefore thermal management becomes more challenging in micro-electronic or optical devices. Here we aim at revealing the predominance of Surface Phonon-Polaritons (SPhPs) in thin film heat conduction. SPhPs are evanescent electromagnetic waves coupled to optical phonons and propagating along the interfaces of polar dielectrics. Through theoretical demonstration, SPhP propagation length reaches ten micrometers and SPhP spectral range reduces to the one of Surface Phonon-Polariton resonance in semi-infinite systems. Consequently, SPhPs contribution to heat flux along a surface is usually found negligible.
  We have shown that thin film geometries allow for drastic changes in the surface evanescent electromagnetic field in terms of spectrum broadening and of propagation length. In thin silica films with thicknesses smaller than 1 micron, propagation length can reach centimeters and more, and evanescent waves exist in the full spectral range. Our calculations predict that those two modifications yield guided radiative heat fluxes higher than the one carried by phonons.
  Moreover, thermal conductivity contributed by SPhPs can be further enhanced by increasing temperature. Nevertheless no experimental result directly proves neither the existence of a SPhP heat channel nor the enhancement of thermal conductivity in thin film due to those carriers. We experimentally measure effective in-plane thermal conductivity of amorphous SiN thin films and show that it can indeed be significantly increased by surface SPhPs when the film thickness scales down.

"Integrated Photonics for 2020 and beyond"
Ray T. Chen (The University of Texas, Austin)

  Integrated photonics is poised to revolutionize inter- and intra-data center communications since internet traffic continues to increase exponentially making it difficult and costly for existing switching and interconnects in data centers to cope with the fast-growing bandwidth requirement. Silicon photonics is able to contribute data centers in terms of the lower cost, higher bandwidth, and lower power consumption. As many fundamental components including the power-efficient modulators, integrated photonics is believed to have reached the tipping point with a surging global market. Besides the optical interconnects, integrated photonics also shows the promise in abundant applications, ranging from high performance computing and autonomous cars, to biomedical sensing and even aerospace applications.
  In this invited plenary talk, an overview of the silicon photonics as well as a potential trend for 2020 and beyond will be provided. First, the recent development of optical components including passive and active modules as well as optical circuits in silicon photonics will be presented. Second, as Moore's law has been approaching the physical limitation, photonics-based high-performance computing is envisioned as a potential answer to the continuation of Moore's law. We propose and experimentally demonstrate a new photonics-assisted full adder which is capable of operating at a higher frequency than electrical counterparts while consuming less power. This paves the way to the future integrated high-speed and power-efficient optical computing. Sensing related applications will also be addressed in the presentation. Finally, the main challenges that require technical breakthroughs for the upcoming years will be discussed.


EPS Special Speakers
"Design Challenges for Advanced Electronic Packaging"
Chris Bailey (University of Greenwich)

  Advanced electronic packaging for system and heterogeneous integration of electronic, electrical, optoelectronic, biological, micromechanical and sensing components is estimated to grow significantly over the next ten years. Packaging technologies such as wafer-level packaging, panel-level packaging, 3D-IC, embedding, etc, pose a number of challenges for design tools. These advanced packaging technologies result in die-package-system interactions (physical (e.g. pathfinding, bump placement, floor-planning, etc), electrical, thermal, and mechanical stresses) that cannot be ignored. Hence there is a need to replace the current segregated design flow for chip, package and system with a parallel and integrated design flow, supported by multi-physics modelling tools, to enable co-design optimisation across the chip-package-system domains. This presentation will detail current state of art in co-design, modelling, and simulation for advanced electronic packaging and the need for close collaboration between metrology and modelling. Number of case studies will also be presented to highlight the challenges that need to be addressed.

"Electronic Packaging: The Next 20 Years"
Beth Keser (Intel Corporation)

  The future of electronic packaging is bright as Moore's Law wanes and many new applications depend on advanced packaging solutions rather than the next transistor node for improved performance. Current mechanical, thermal, material, and electrical issues will multiply as solutions are required for System-in-Package integration, high reliability, low power, low loss, good thermal and electrical performance, and optimized cost and footprint. Advances in Fan-Out Wafer and Panel Level Packaging are adding value to the mobile, automotive, and IoT industries, but new package architectures and designs are needed to address Autonomous Driving, Artificial Intelligence, Extreme CPU/GPU and Virtual/Augmented Reality applications. The 5G packaging challenges of low latency, cost, thermals, and optimized form factor and power along with good coverage need to be addressed. There are many packaging challenges ahead and significant advancements will be required in interdisciplinary research over the next 20 years.


AI Special Speakers
"Ultra-Low Power Brain-Inspired Processors and Neuromorphic Processors with CMOS/MTJ Hybrid technology for Edge AI Systems"
Tetsuo Endoh (Tohoku University)

  To build the Edge AI systems that can learn, reason and help humans make better decisions such on image recognition, automotive car control, video surveillance etc., the AI VLSIs mimicking the functions of human brain have been widely investigated to achieve the excellent computational speed. However, the conventional CMOS type AI VLSIs have issues of the large power consumption.
  From above point of view, in this invited talk, it is discussed that CMOS/MTJ hybrid VLSI technology has an impact in AI systems. NV-AI VLSIs require tough endurance for realizing deep learning and excellent CMOS compatibility for realizing high level fusion system between remembrance and judgment. Therefore, STT-MRAM is the best choice for NV-AI VLSIs due to its excellent endurance and compatibility with CMOS.
  Next, our previous developed two kinds of AI chip of Brain-Inspired Processors and Neuromorphic Processors with CMOS/MTJ hybrid technology are shown.
  Finally, it is discussed that our Ultra-Low Power Brain-Inspired Processors and Neuromorphic Processors with CMOS/MTJ hybrid technology are one of most suitable way to realize Edge AI systems.

"Photonic and memristive technologies on silicon for analog synaptic processing in neuromorphic computing"
Bert Jan Offrein (IBM Research - Zurich)

  The performance increase of established Von Neumann computing systems has been defined by the scaling of silicon chip technology according to Moore's law as well as advances in assembly and system integration concepts. While these scaling paths run into technological and commercial challenges, these types of systems are not well suited to process the enormous amounts of unstructured data generated nowadays. Analog synaptic signal processing holds the promise for massive performance and power-efficiency enhancements in neuromorphic computing. Memristive and photonic concepts and technologies will be presented.

"On-Device Learning and Its Applications: Toward Learning AI Chips"
Hiroki Matsutani (Keio University)


Invited Speakers
"Trends in enhanced integrated photonics for hyperscale data centre and 5G environments"
Richard Pitwon (Resolute Photonics Ltd.)
"Single-mode glass waveguide substrate for PIC packaging"
Lars Brusberg (Corning Research & Development Corporation)
"Holistic transformation to enable the mass manufacturing of Tb/s transceivers"
Tolga Tekin (Fraunhofer IZM)
"Market & Industrial Trends of Optical Interconnect"
Bernard HL Lee (SENKO Advanced Components (HK) Ltd)
"Hybrid photonic integration and 3D nano-printing: Combining silicon photonics with organic materials"
Christian Koos (Karlsruhe Institute of Technology)
"400G and Beyond: High-Speed Heterogeneous Photonics Integration based on Silicon Interposer for Data Center Networking"
Chin-Ta Chen (Centera Photonics Inc.)
"Temporal and Spatial Modification of Thermal Radiation"
Chih-Ming Wang (National Dong Hwa University)
"Vehicle Thermal Management Using Heat Pipes"
Randeep Singh (Fujikura Ltd.)
Advanced PKG:
"PLP - From Idea to Industrialization"
Tanja Braun (Fraunhofer IZM)
""Photo Mold" the Innovation of Packaging"
Shuzo Akejima (Rising Technologies Co., Ltd.)
"Thermally stable and transparent polyketone resin"
Hiroshi Matsutani (Hitachi Chemical Co., Ltd.)
Power electronics:
"Unleashing the potential of α-Ga2O3"
Takuto Igawa (FLOSFIA Inc.)
"Mapping of metal/semiconductor and semiconductor/semiconductor interfaces using scanning internal photoemission microscopy"
Kenji Shiojima (University of Fukui)
"Physical Layer Simulation Technology for Automotive Ethernet"
Takehiro Kawauchi (Sumitomo Electric Industries, LTD.)
"High efficiency MIMD-based Vector Processor for Automotive AI applications"
Teppei Hirotsu (NSITEXE, Inc.)



Back to top page