| December 10, 2012 | ||||
| 8:00 | Registration | |||
| Room S | ||||
| 9:00 | Opening Remarks: Hiroshi Yamada (General Chair, IEEE CPMT Symposium Japan; Toshiba Corporation) | |||
| Plenary Session: Shigeru Nakagawa (IBM Research - Tokyo)、Shigenori Aoki (Fujitsu Laboratories) | ||||
| 9:15 | Molding technologies – a new way for system integration Rolf Aschenbrenner (Fraunhofer-IZM) | |||
| 10:15 | The IBM Blue Gene/Q Interconnect Architecture Yutaka Sugawara (IBM T.J. Watson Research Center) | |||
| 11:15 | Lunch | |||
| Room A | Room B | Room C | Room S | |
| 13:00 | Session 1: | Session 3: | Session 5: | Session 7: |
| High-Speed Optical Transceiver | Low Temperature Bonding | R&D from China | System in Packaging | |
| Shigeru Nakagawa (IBM Research - Tokyo) | Nobuhiro Imaizumi (Fujitsu Laboratories) | Yinghui Wang (University of Tokyo) | Michitaka Kimura (Renesas Electronics) | |
| Fumio Koyama (Tokyo Institute of Technology) | Shoji Uegaki (ASE) | Daoguo YANG (Guilin University of Electronic Technology) |
Kenji Takahashi (Toshiba） | |
 Integration Technologies and Packaging for Efficient Si Photonics Links |
Low-temperature bonding of laser diode chips using atmospheric-pressure plasma activation of flat topped Au stud bumps with smooth surfaces. | Fast Life-time Assessment of LED Luminaries |
3D Packaging Trend - TSV or TMV? |
|
| Kannan Raj (Photonics Research Director, Oracle Labs) | Michitaka Yamamoto1, Takeshi Sato1, Eiji Higurashi2, Tadatomo Suga1 and Renshi Sawada3 (School of Engineering, The University of Tokyo1, Research Center for Advanced Science and Technology, The University of Tokyo2, Department of Intelligent Machinery and Systems, Kyushu University3) | Daoguo Yang, Miao Cai, Wenbin Chen and Zhen Zhang (Guilin University of Electronic Technology) | Akito Yoshida (Amkor Technology Japan) | |
| 13:25 | High-stability 25 Gb/s optical transceiver module with flexible polymer wave guide for optical interconnection | Low temperature Cu-Cu direct bonding for 3D-IC by using fine crystal layer | Solid-state Bonding Using Metallic Cone Layer for Interconnection |
Thin Packaging – What is Next? |
| Naoki Matsushima1, Toshiaki Takai1, Daichi Kawamura2, Yasunobu Matsuoka2, Yong Lee2,3, Norio Chujo1, Takashi Takemoto2,3, Hiroki Yamashita2,3, Toshiki Sugawara2, Toru Yazaki1 and Shinji Tsuji2,3 (Yokohama Research Laboratory, Hitachi, Ltd.1, Central Research Laboratory, Hitachi, Ltd.2, Photonics Electronics Technology Research Association3) | Taiji Sakai, Nobuhiro Imaizumi, Toyoo Miyajima (Fujitsu Laboratories LTD.) | Ming Li1, Anmin Hu2, Zhuo Chen1, Qin Lu1, Wenjing Zhang1, Tadatomo Suga2, Yinghui Wang2, Eiji Higurashi2 and Masahisa Fujino2 (State Key Laboratory of Metal Matrix Composites, Key Laboratory for Thin Film and Microfabrication Technology of the Ministry of Education, School of Material Science and Engineering, Shanghai Jiao Tong University1, School of Engineering, University of Tokyo2) | Bernd K Appelt, Andy Tseng, Shoji Uegaki and Kay Essig (Advanced Semiconductor Engineering Group) | |
| 13:50 | A 25-Gbit/s High-speed Optical-electrical Printed Circuit Board for Chip-to-chip Optical Interconnections | Room Temperature Microjoining of qVGA Class Area-Bump Array Using Cone Bump | Ni Barrier for Tin Whisker Mitigation | Large Scale System-in-Package (SiP) Module for Future Networking Products |
| Yasunobu Matsuoka1,2, Koichiro Adachi1,2, Yong Lee1,2 and Tatemi Ido1,2 (Central Research Laboratories, Hitachi, Ltd.1, Photonics Electronics Technology Research Association2) | Takanori Shuto, Keiichiro Iwanabe, Li Jing Qiu and Tanemasa Asano (Graduate School of Information Science and Electrical Engineering, Kyushu University) | Ting Liu1, Dongyan Ding1, Yiqing Wang1, Yu Hu2, Yihua Gong2 and Klaus-Peter Galuschki3 (Institute of Microelectronic Materials & Technology, School of Materials Science and Engineering, Shanghai Jiao Tong University1, Electronic Assembly Processes & Materials, Corporate Technology, Siemens Ltd.2, Siemens AG3) | Ryusuke Ohta2, Mohan Nagar1, Mudasir Ahmad1, Michiaki Tamagawa2, Katsumi Miyata2 and Takuya Suzuki2 (Cisco Systems Inc.1 Fujitsu Integrated Microtechnology Ltd.2) | |
| 14:15 | Integrated Package for 100G Ethernet Optical Transmitter | Cu wire bonding knows no limit - 28 nm is qualified | High Density Package Solutions for Next-Generation Smartphone, Ultrabook and Tablet Computing | |
| Nobuyuki Yasui1, Koji Shibuya1, Tadashi Murao1, Takeshi Yamatoya2, Keita Mochizuki1 and Hiroshi Aruga1 (Information technology R & D Center, Mitsubishi Electric Corporation1, High Frequency & Optical Device Works, Mitsubishi Electric Corporation2) | Bernd K Appelt, Andy Tseng, Shoji Uegaki, Louie Huang (ASE Group) | Vern Solberg, Wael Zohni and Ilyas Mohammed (Invensas Corporation) | ||
| 14:40 | Coffee break | |||
| 15:10 | Session 2: | Session 4: | Session 6: | Session 8: |
| Optical Waveguide Technology | Solder Bonding | R&D from China | Advanced Packaging | |
| Shigenori Aoki (Fujitsu Laboratories) | Shoji Uegaki (ASE) | Daoguo YANG (Guilin University of Electronic Technology) |
Hiroshi Yamada (Toshiba） | |
| Okihiro Sugihara (Tohoku University) | Nobuhiro Imaizumi (Fujitsu Laboratories) | Yinghui Wang (University of Tokyo) | Michitaka Kimura (Renesas Electronics) | |
| Graded-Index Core Polymer Optical Waveguide for High-Speed and High-Density
On-Board Interconnects |
Effect of preformed Cu-Sn IMC Layer on Electromigration Reliability of Solder Capped Cu Pillar Bump Interconnection on an organic substrate | JCAP Technology Introduction |
Novel DAF (Die Attach Film) separation technologies for ultra-thin chip | |
| Takaaki Ishigure (Faculty of Science and Technology, Keio University) | Yasumitsu Orii1, Kazushige Toriyama1, Sayuri Kohara1, Hirokazu Noma1, Keishi Okamoto1 and Keisuke Uenishi2 (IBM Research Tokyo1, Osaka University2) | Kim-Hwee Tan (Jiangyin Changdian Advanced Packaging Co., Ltd.) | Shinya Takyu, Tetsuya Kurosawa and Akira Tomono (Toshiba Corporation Semiconductor & Storage Products Company) | |
| 15:35 | Improvement of Polynorbornene Waveguide Based O/E Module Performance with Microlens Structure | Productivity Improvement of Copper Pillar Flip-chip Package by Pre-applied Materials and Press Machine | Heterogeneous Integration of MEMS Sensor Array and CMOS Readout IC with
Through Silicon Via Interconnects |
Volume production technologies of passive and active components embedded PWB |
| Motoya Kaneta, Shinsuke Terada, Akihiro Horimoto, Shinya Arai and Koji Choki (Circuitry with Optical Interconnection Business Development Dept., Sumitomo Bakelite Co., Ltd.) | Koji Motomura, Hiroki Maruo, Wanyu Tie, Hideki Eifuku, Shoji Sakemi and Tadahiko Sakai (Panasonic Factory Solutions Co., Ltd.) | Qian Wang, Siyi Xie, Tao Wang, Jian Cai, Ziyu Liu, Dong Wu, Mengyun Yue, Zheyao Wang, Shuidi Wang and Songliang Jia (Institute of Microelectronics, Tsinghua University) | Hiroyuki Saito, Kiyotake Ikura and Naoki Kitajima (Dai Nippon Printing Co., Ltd.) | |
| 16:00 | Light-induced self-written waveguide for optoelectronic integration devices | Joint Reliability Study of Solder Capped Metal Pillar Bump Interconnections on an Organic Substrate | Electrochemical Analysis of Cathode in TSV Copper Electroplating | Electrical Properties of Flexible Vertically aligned Carbon Nanotube Bumps under Compression |
| Tatsuya Yamashita, Daisuke Inoue, Akari Kawasaki, Osamu Watanabe and Manabu Kagami (Toyota Central R&D Labs., Inc.) | Kazushige Toriyama1, Yasushi Takeoka2, Keishi Okamoto1, Hirokazu Noma1 and Yasumitsu Orii1 (IBM Japan, IBM Research-Tokyo1, IBM Japan Electronics Component Technology2) | Haiyong Cao1, Xue Feng1, Qi Sun1, Wei Luo1, Huiqin Ling1, Jiangyan Sun2 and Ming Li1 (Institute of Microelectronic Materials & Technology, School of Materials Science and engineering, Shanghai Jiao Tong University1, Shanghai Sinyang Semiconductor Materials Co., Ltd.2) | Masahisa Fujino, Hidenori Terasaka, Tadatomo Suga, Ikuo Soga, Daiyu Kondo, Yoshikatsu Ishizuki and Taisuke Iwai (Department of Precision Engineering, The University of Tokyo) | |
| 16:25 | Analysis of inter-channel crosstalk in multi-mode parallel optical waveguide using Beam Propagation Method | Impact Test Performance of Zn-based Die-attach Joints for Power Devices | Challenges of 3D-IC in the Era of Big Data |
|
| Takuya Kudo1 and Takaaki Ishigure2 (Graduate School of Science and Technology, Keio University1, Faculty of Science and Technology, Keio University2) | Jenn-Ming Song1, Meng-Ju Lin2, Yi-Shao Lai3 and Ying-Ta Chiu3 (Department of Materials Science and Engineering, National Chung Hsing University1, Department of Materials Science and Engineering, National Dong Hwa University2, Central Labs, Advanced Semiconductor Engineering, Inc.3) | Yasumitsu Orii (IBM Research Tokyo) | ||
| 18:00 | Welcome Reception | |||
| 20:00 | Close | |||
| December 11, 2012 | ||||
| 8:00 | Registration | |||
| Room A | Room B | Room C | Room S | |
| 9:00 | Session 9: | Session 13: | Session 17: | Session 21: |
| Devices for Optical Interconnect | Reliability | Noise and Crosstalk Reduction | Chip/Wafer Level Packaging | |
| Takaaki Ishigure (Keio University) | Tadahiro Shibutani (Yokohama National University) |
Jianqing Wang (Nagoya Institute of Technology) |
Hideki Sasaki (Renesas Electronics) | |
| Tatsuya Yamashita (Toyota Central R&D Labs.) |
Masao Sakane (Ritsumeikan University) | Yutaka Uematsu (Hitachi Ltd.) | Shinya Takyu (Toshiba) | |
| Next Generation Optical Interconnect Devices Using Photonic Polymers |
Board Level Drop Test Modeling | Novel EMI Shielding Methodology on Highly Integration SiP Module | Development of a Novel Thermal Compression Flip Chip Bonding with Pre-Applied NCF Underfill | |
| Okihiro Sugihara (Tohoku University) | Masazumi Amagai and Jang Seungmin (Modeling Group, TMG Japan, Texas Instruments ) | Liao Kuo-Hsien, Alex Chi-Hong Chan, Shen Chia Hsien, Lin I-Chia and Huang Hsin Wen (Advanced Semiconductor Engineering Inc.) | Kota Takeda, Takao Koshi, Kenkichi Arai, Yoshihiro Machida, Kiyoshi Oi, Yuka Tamadate, Tsuyoshi Sohara, Yasushi Araki and Takashi Ozawa (IC Assembly Division, Shinko Electric Industries Co., LTD.) | |
| 9:25 | Athermal and Tunable VCSELs with a Thermally Actuated Cantilever Structure for WDM Optical Interconnects | Investigation of Fracture Behaviors of Cu-Sn Intermetallics using Impact Test | Proposal and analysis of three-phase filter by using mixed-mode S-parameter based on Fortescue transformation | Using Nano-Porous Au-Ag Sheets as a Joint Layer for Low-Temperature Au-Au Bonding |
| Hayato Sano, Norihiko Nakata, Masanori Nakahama, Akihiro Matsutani and Fumio Koyama (Photonic Integration System Research Center, Tokyo Institute of Technology) | Chaoran Yang and S. W. Ricky Lee (Department of Mechanical Engineering, Center for Advanced Microsystems Packaging, Hong Kong University of Science & Technology) | Yoshikazu Fujishiro and Kohji Koshiji (Faculty of Science and Technology, Tokyo University of Science) | Hayata Mimatsu1, Jun Mizuno2, Takashi Kasahara1, Mikiko Saito3, Hiroshi Nishikawa3 and Shuichi Shoji1 (Major in Nano-science and Nano-engineering, Waseda University1, Institute for Nanoscience and Nanotechnology, Waseda University2, Joining and Welding Research Institute, Osaka University3) | |
| 9:50 | Modeling and Experiment on Low Voltage Slow-Light Electro-absorption Modulators for High-speed and Low Power Consumption Optical Interconnect | Prognostic health monitoring method for printed circuit boards subjected to random cyclic loads | VLSI Nano-Scale Interconnect Induced Crosstalk Power Estimation | Development of Low Temperature Curable Positive Tone Photosensitive Dielectric Material |
| Syoki Shimizu, Xiaodong Gu, Toshikazu Shimada, Akihiro Matsutani and Fumio Koyama (Photonics Integration System Research Center, Tokyo Institute of Technology) | Kenji Hirohata, Yousuke Hisakuni, Takahiro Omori and Minoru Mukai (Toshiba Corporation, Corporate Research and Development Center) | Atefesadat Seyedolhosseini, Nasser Masoumi and Milad Mehri (Advanced VLSI Laboratory, School of Electrical and Computer Engineering, College of Eng., University of Tehran) | Akitoshi Tanimoto1, Koichi Abe1, Shigeru Nobe2 and Hiroshi Matsutani1(Tsukuba Research Laboratory, Hitachi Chemical Co., Ltd.1, Semiconductor Materials Division, Hitachi Chemical Co., Ltd.2) | |
| 10:15 | Cavity-resonator-integrated Guided-mode Resonance Filter with Reflection Phase Variation | A Built-in Electrical Test Circuit for Interconnect Tests in Assembled PCBs | Statistical Study of Nano-Scale VLSI Interconnect Crosstalk and Its Induced Power Estimation | Low Temperature Bonding Using Sub-micron Au Particles for Wafer-level MEMS Packaging |
| Junichi Inoue1, Tomonori Ogura1, Koji Hatanaka1, Kenji Kintaka2, Kenzo Nishio1, Yasuhiro Awatsuji1 and Shogo Ura1 (Kyoto Institute of Technology1, National Institute of Advanced Industrial Science and Technology2 ) | Widianto1, Hiroyuki Yotsuyanagi1, Akira Ono2, Masao Takagi2, Zvi Roth3 and Masaki Hashizume1 (The University of Tokushima1, Kagawa National College of Technology2, Florida Atlantic University3) | Milad Mehri1, Resza Sarvari2 and Atefesadat Seyedolhosseini1 (School of Electrical and Computer Engineering, College of Eng., University of Tehran1, Faculty of Electrical Engineering , Sharif University of Technology2) | Shin Ito1, Jun Mizuno1, Hiroyuki Ishida2, Toshinori Ogashiwa3, Yukio Kanehira3, Hiroshi Murai3, Fumihiro Wakui4 and Shuichi Shoji1 (Waseda University1, SUSS MicroTec KK.2,Tanaka Kikinzoku Kogyo K.K3., Tokyo Institute of Technology4) | |
| 10:40 | Coffee Break | |||
| 11:00 | Session 10: | Session 14: | Session 18: | Session 22: |
| Optical and Electrical Coupling | Reliability | Integration Technology | 3-D Integration by ASET "Dream Chip Project" |
|
| Kannan Raj (Oracle) | Takamoto Ito (Fukui University) | Taras Kushta (NEC) | Kanji Otsuka (Meisei University) | |
| Shogo Ura (Kyoto Institute of Technology) |
Kenji Hirohata (Toshiba) | Nobuhiro Kuga (Yokohama National University) |
Masahiro Aoyagi (AIST) | |
| Compact multi-fiber receptacle interface for on-board optical interconnection | Warpage Modeling for 3D Packages | 60GHz Antenna Integrated Transmitter Module |
Chip-Based Hetero-Integration Technology for High-Performance 3D Stacked Image Sensor | |
| Kota Shikama, Shuichiro Asakawa, Yoshiteru Abe, Shuichi Yanagi, Junya Kobayashi and Tetsuo Takahashi (NTT Photonics Laboratories, NTT Corporation) | Masazumi Amagai and Yutaka Suzuki (Modeling Group, TMG Japan, Texas Instruments ) | Noriharu Suematsu, Shoichu Tanifuji, Satoshi Yoshida, Yuya Suzuki, Suguru Kameda, Tadashi Takagi and Kazuo Tsubouchi (Tohoku University) | Yuki Ohara1, Kang Wook Lee1, Koji Kiyoyama1,2, Shigehide Konno1, Yutaka Sato1, Shuichi Watanabe1,3, Atsushi Yabata1,3, Harufumi Kobayashi3, Tadashi Kamada3, Jichel Bea1, Mariappan Murugesan1, Hiroyuki Hashimoto1, Tadafumi Fukushima1, Tetsu Tanaka1 and Mitsumasa Koyanagi1 (Tohoku University1, Nagasaki Institute of Applied Science2, Association of Super-Advanced Electronics Technologies (ASET)3 ) | |
| 11:25 | Sn-Ag-Cu-solder-reflow-capable 10-Gb/s × 4-channel very thin high-density parallel-optical modules | In-situ Observation of Whisker Nucleation in Air with AFM | 3D integration techniques using stacked PCBs and small dipole antenna for wireless sensor nodes | Heterogeneous 3D Stacking Technology Developments in ASET |
| Kazuya Nagashima, Yozo Ishikawa and Hideyuki Nasu (FITEL Photonics Laboratory, Furukawa Electric Co., Ltd.) | Hiroshi Onuki and Tadahiro Shibutani (Yokohama National University) | Shoichi Oshima, Kenichi Matsunaga, Hiroki Morimura and Mitsuru Harada (NTT Microsystem Integration Laboratories) | Hiroaki Ikeda (Association of Super-Advanced Electronics Technologies (ASET)) | |
| 11:50 | Development of Low-Cost Elastic Optical Multifiber Connector for Optical Interconnection | Low Cycle Fatigue Crack Initiation and Propagation Behavior of Copper Thin Films Used in Electronic Devices | Wireless Body Area Communication using Electromagnetic Resonance Coupling | Thermal Stress and Die-Warpage Analyses of 3D Die Stacks on Organic Substrates |
| Tsuyoshi Aoki1, Hidenobu Muranaka1, Shigenori Aoki1, Katsuki Suematsu2, Mitsuhiro Iwaya2 and Masato Shiino2 (Fujitsu Laboratories Ltd.1, Furukawa Electric Co., Ltd.2) | Tasuku Kambayashi1, Masao Sakane1 and Kenji Hirohata2 (Department of Mechanical Engineering, Ritsumeikan University1, Toshiba Corporation, Corporate Research & Development Center2) | Fukuro Koshiji1,3, Nanako Yuyama1 and Kohji Koshiji2.3 (School of Science and Engineering, Kokushikan University1, Faculty of Science and Technology, Tokyo University of Science2, Research Institute for Science and Technology, Tokyo University of Science3) | Sayuri Kohara, Kuniaki Sueoka, Akihiro Horibe, Keiji Matsumoto, Fumiaki Yamada and Yasumitsu Orii (Association of Super-Advanced Electronics Technologies (ASET)) | |
| 12:15 | A compound of RGB-splitter and condensers for compact image sensor | Nondestructive defect analysis solution using combination of Lock-in IR Thermography and high resolution X-ray CT technology | Development of Human Body Communication Transceiver Based on Impulse Radio Scheme | Study for CMOS device characteristics affected by Ultra Thin Wafer Thining |
| Tadayuki Hirano1, Naoko Shimatani1, Kenji Kintaka2, Kenzo Nishio1, Yasuhiro Awatsuji1 and Shogo Ura1 (Kyoto Institute of Technology1, National Institute of Advanced Industrial Science and Technology2 ) | Naoki Seimiya (Marubun Corporation) | Kageyuki Shikada and Jianqing Wang (Nagoya Institute of Technology) | Haruo Shimamoto1, Chuichi Miyazaki1, Yoshiyuki Abe1,Shigeaki Saito1, Kosuke Kitaichi1, Shoji Yasunaga1, Kang Wook Lee2, Tetsu Tanaka2 and Mitsumasa Koyanagi2 (Association of Super-Advanced Electronics Technologies (ASET)1, Tohoku University2) | |
| 12:40 | Lunch | |||
| 13:40 | Session 11: | Session 15: | Session 19: | Session 23: |
| Optoelectronic Packaging | Material | Circuit Operation Stability | 3-D Integration by ASET "Dream Chip Project" |
|
| Ricky Lee (HKUST) | Takashi Hattori (Hitachi) | A. Ege Engin (Sandiego University) | Kenichi Takeda (ASET) | |
| Atsushi Okuno (SANYU REC) | Phillip Hall (FUJI MACHINE MFG.) | Hideki Osaka(Hitachi) | Haruo Shimamoto (ASET) | |
| Ultracompact 4x3.4 Gbps Optoelectronic Package for an Active Optical HDMI Cable | Development of Low CHE, Negative-Tone, Photo-Definable Polyimide for HDD suspension | Measurement Results of Substrate Bias Dependency on Negative Bias Temperature Instability Degradation in a 65 nm Process | Three-dimensional Integration Scheme using Hybrid Wafer Bonding and Via-last TSV Process | |
| Norbert Schlepple1, Michihko Nishigaki1, Hiroshi Uemura1, Hideto Furuyama1, Yoshiaki Sugizaki1, Hideki Shibata1 and Yasuhito Koike2 (Center for Semiconductor Research and Development, Semiconductor & Storage Products Company, Toshiba Corporation1, Faculty of Science and Technology, Keio University2) | Masayuki Ohe1, Tomonori Minegishi2, Dai Kawasaki1, Keiko Suzuki1, Taku Konno1 and Takahiro Hidaka2 (Hitachi Chemical DuPont MicroSystems Ltd.1 , Hitachi Chemical Co., Ltd.2) | Syuichi Tanihiro1, Michitarou Yabuuchi1 and Kazutoshi Kobayashi2 (Department of Electronics, Kyoto Institute of Technology1, JST. CREST2 ) | Kenichi Takeda, Mayu Aoki, Kazuyuki Hozawa, Futoshi Furuta, Azusa Yanagisawa, Hidekazu Kikuchi, Toshio Mitsuhashi and Harufumi Kobayashi (Association of Super-Advanced Electronics Technologies (ASET) ) | |
| 14:05 | High Bright White LED Packaging Systems Using Unique Vacuum Printing Technology (VPES) | Development of DAF (Die Attach Film) with functional gettering agent for metal impurities | Co-simulation of AC Power Noise of CMOS Microprocessor using Capacitor Charging Modeling | Introduction of the automotive application of TSV device |
| Atsushi Okuno, Yoshiteru Miyawaki, Osamu Tanaka, June Ooki, Makoto Okuda and Hirofumi Torigoe (SANYU REC Co., Ltd.) | Norihiro Togasaki, Shinya Takyu, Tetsuya Kurosawa, Yuji Yamada, Makiko Tamaoki, Hidekazu Hayashi and Hiroshi Tomita (Toshiba Corporation Semiconductor & Storage Products Company) | Kumpei Yoshikawa and Makoto Nagata (Graduate School of System Informatics, Kobe University) | Tadashi Kamada (Association of Super-Advanced Electronics Technologies (ASET) ) | |
| 14:30 | Effects of GaN Blue LED Chips and Phosphors on Optical Performance of White Light LED | Examination of insoluble anodes used for acid copper plating | Power Supply Noise Suppression By Optimizing On-die PDN Impedance | 3D System Simulation Study of Power Integrity using Si Interposer with Distribution TSV Decoupling Capacitors |
| Huishan Zhao1,2, Changying Chen1 and S. W. Ricky Lee2 (Department of Optoelectronic Engineering, Jinan University1, HKUST LED-FPD Technology R&D Center at Foshan2) | Hideki Hagiwara (EBARA-UDYLITE CO.,LTD.) | Yoshinori Kobayashi, Ryota Kobayashi, Tatsuya Mido, Genki Kubo, Hiroki Otsuka, Hideyuki Fujii and Toshio Sudo (Shibaura Institute of Technology) | Kazuo Kohno2, Yasuhiro Kitamura1, Tadashi Kamada1, Junji Ohara1, Yutaka Akiyama2, Chihiro Ueda2 and Kanji Otsuka2 (Association of Super-Advanced Electronics Technologies (ASET)1, Collaborative Research Center, Meisei University2 ) | |
| 14:55 | Color Tuning dispense process to minimize color variation | Macromodeling of Complex Power Delivery Networks for Efficient Transient Simulation | ||
| Masaru Nonomura (Panasonic Factory Solutions Co., Ltd.) | A. Ege Engin1, Bhavya Adepu1, Manabu Kusumoto2 and Takashi Harada2 (San Diego State University1, NEC Corporation2) | |||
| 15:20 | Coffee break | |||
| 15:40 | Session 12: | Session 16: | Session 20: | Session 24: |
| 3D Technology | Electric Conductive Material | Power Integrity & Signal Integrity | 3-D Integration by ASET "Dream Chip Project" |
|
| Hiroshi Yamada (Toshiba） | Phillip Hall (FUJI MACHINE MFG.) | Hideki Osaka (Hitachi) | Hiroaki Ikeda (ASET) | |
| Michitaka Kimura (Renesas Electronics) | Tomonori Minegishi (Hitachi Chemical) | Takashi Harada (NEC) | Tadashi Kamada (ASET) | |
| Temporary Bonding / De-Bonding and Permanent Wafer Bonding Solutions for 3D Integration | Surface Characterization of Resilience Sheet as a Packaging Material for the Metallic Ink Printing | Novel Technology for Power Integrity using by Metal Particle Conductive Layer | Transient Response Characteristics of Through Silicon Via in High Resistivity Silicon Interposer | |
| Hiroyuki Ishida1, Sumant Sood2, Christopher Rosenthal2 and Stefan Lutter3 (SUSS MicroTec KK1, SUSS MicroTec Inc.2, SUSS MicroTec Lithography GmbH3) | Kiyokazu Yasuda (Osaka University) | Norifumi Sasaoka1, Takafumi Ochi1, Masato Oono1, Chihiro Ueda2, Yutaka Akiyama2 and Kanji Otsuka2 (Nippon Kodoshi Corporation1, Meisei University2 ) | Naoya Watanabe1, Chihiro Ueda2, Fumiaki Fujii2, Yutaka Akiyama2, Katsuya Kikuchi1, Yasuhiro Kitamura3, Toshio Gomyo3, Toshikazu Ookubo3, Tetsuya Koyama3, Tadashi Kamada3, Masahiro Aoyagi1 and Kanji Otsuka2 (Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology (AIST)1, Collaborative Research Center, Meisei University2, Association of Super-Advanced Electronics Technologies (ASET)3 ) | |
| 16:05 | Low Cost TSV Integration for Advanced Packaging Technologies | Thermal and Electric Conductive Analysis in Isotropical Conductive Adhesive by Modeling 3D Fillers Dispersion Observed by FIB-SEM | A Signal and Power Integrity Oriented Packaging for Low Cost and High Performance Systems | PDN Characteristics of 3D-SiP with a Wide-bus Structure under 4k-IO Operations |
| Yasuhiro Morikawa, Takahide Murayama, Toshiyuki Sakuishi, Ai Tanaka, Yuu Nakamuta and Koukou Suu (ULVAC, Inc., Institute of Semiconductor and Electronics Technologies) | Osamu Arao, Akira Shintai and Akio Sugiura (DENSO Co., Ltd.) | Daisuke Iguchi and Hideyuki Umekawa (Fuji Xerox Co., Ltd.) | Atsushi Sakai1, Shigeru Yamada1, Takashi Kariya1, Shiro Uchiyama1, Hiroaki Ikeda1, Haruya Fujita2, Hiroki Takatani2, Yosuke Tanaka2, Yoshiaki Oizono2, Yoshitaka Nabeshima2 and Toshio Sudo2 (Association of Super-Advanced Electronics Technologies (ASET)1, Shibaura Institute of Technology2) | |
| 16:30 | Wide Bus Chip-to-Chip Interconnection Technology Using Fine Pitch Bump Joint Array for 3D LSI Chip Stacking | Phase transformation of Cu@Ag Core-shell Nanoparticles upon Heating | Electromagnetic Band Gap structure for cut off of low frequency noise in 3-D printed circuit board | A Highly Reliable Single-Crystal Silicon RF-MEMS Switch Using Au Sub-micron Particles for Wafer Level LTCC Cap Packaging |
| Masahiro Aoyagi1, Fumito Imura1, Shunsuke Nemoto1, Naoya Watanabe1, Fumiki Kato1, Katsuya Kikuchi1, Hiroshi Nakagawa1, Michiya Hagimoto2, Hiroyuki Uchida2 and Yukoh Matsumoto2 (Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology (AIST)1, TOPS Systems Corporation2) | Chi-Hang Tsai1, Shih-Yun Chen2, Jenn-Ming Song3, In-Gann Chen4 and Hsin-Yi Lee5 (Graduate Institute of Applied Science and Technology, National Taiwan University of Science and Technology1, Department of Materials Science and Engineering, National Taiwan University of Science and Technology2, Department of Materials Science and Engineering, National Chung Hsing University3, Department of Materials Science and Engineering, National Cheng Kung University4, National Synchrotron Radiation Research Center5) | Tadahiro Sasaki1, Hiroshi Yamada1, Kazuhiko Itaya1, Tooru Kijima2 and Kazuhisa Imura2 (Corporate Research & Development Center, Toshiba Corporation1, Toshiba Corporation Social Infrastructure Systems Company2 ) | Takashi Katsuki1, Tadashi Nakatani1, Hisao Okuda2, Osamu Toyoda2, Satoshi Ueda1 and Fuihiko Nakazawa1 (Association of Super-Advanced Electronics Technologies (ASET)1, Fujitsu Laboratories Ltd.2 ) | |
| 16:55 | Close | |||
| December 12, 2012 | ||||
| 8:00 | Registration | |||
| Room S | ||||
| 9:00 | Plenary Session : Takashi Harada (NEC) | |||
| Packaging DNA William T. Chen (Advanced Semiconductor Engineering Group) | ||||
| Room A | Room B | Room C | Room S | |
| 10:00 | Session 25 | Session 26: | Session 27: | Session 28: |
| Interconnect | Material for Printed Wiring Board | Component & Circuit | Cooling /Thermal | |
| Yutaka Uematsu (Hitachi) | Takumi Ueno (Shinshu University) | Fukuro Koshiji (Kokushikan University) | Kishio Yokouchi (FICT) | |
| Daisuke Iguchi (Fuji Xerox) | Yutaka Nomura (Hitachi Chemical) | Takashi Harada (NEC) | Atsushi Nakamura (Renesas Electronics) | |
| Characterization of Signal Via Structure in Multilayer Printed Circuit Board up to 50GHz | Development of Low CHE, Negative-Tone, Photo-Definable Polyimide for HDD suspension | Influence of the power-consumption at non-fundamental frequency on Passive intermodulation generation | Phase change Cooling for Energy-Efficient cooling ICT systems |
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| Taiga Fukumori and Daisuke Mizutani (Fujitsu Laboratories Ltd.) | Masayuki Ohe1, Tomonori Minegishi2, Kawasaki Dai1, Keiko Suzuki1, Taku Konno1 and Takahiro Hidaka2 (Hitachi Chemical DuPont MicroSystems Ltd.1 , Hitachi Chemical Co., Ltd.2) | Kohei Takada, Daijiro Ishibashi and Nobuhiro Kuga (Faculty of Engineering, Yokohama National University) | Minoru Yoshikawa, Kenichi Inaba, Arihiro Matsunaga and Hitoshi Sakamoto (NEC Corporation) | |
| 10:25 | Study of the insertion loss of a differential pair of through holes for the 25Gbps serial interconnect | Build-up Electrical Insulation Material for High Speed & High-frequency | Influence of a foam supporter on passive intermodulation measurement using standing-wave coaxial tube method | Impact of Energy Relaxation Time on Heat Generation in Silicon with Electro-Thermal Analysis |
| Go Shinkai, Satoshi Muraoka, Masayoshi Yagu, Yutaka Uematsu and Hideki Osaka (Yokohama Research Laboratory, Hitachi Ltd.) | Tomoki Kunikawa, Toshiaki Tanaka, Hiroshi Kouyanagi and Kazutaka Shirahase (IM Project, R&D Center, Sekisui Chemical Co., Ltd.) | Daijiro Ishibashi and Nobuhiro Kuga (Graduate school of Engineering, Yokohama National University) | Tomoyuki Hatakeyama, Risako Kibushi and Masaru Ishizuka (Toyama Prefectural University) | |
| 10:50 | Novel Compact Bandpass Filters for High-Density Packaging Applications | Formation of Circuit Patterns on the Only Modification Area Using Selective Electroless Deposition | Fundamental Study of Direct Current Resistance Effect on Transmission Line Characteristics | Investigation of Thermal Management Method for Coil and Capacitor in Automobile ECU |
| Taras Kushta and Takashi Harada (Central Research Laboratories, NEC Corporation) | Kunihito Baba1, Masaharu Sugimoto1, Mitsuhiro Watanabe1 and Tetsuo Yumoto2 (Japan Surface Treatment Institute Co., Ltd.1, SANKYO KASEI Co., Ltd.2) | Kaoru Hashimoto, Kazuo Kohno, Yutaka Akiyama, Chihiro Ueda and Kanji Otsuka (Collaborative Research Center, Meisei University) | Shinya Kawakita1, Shiro Yamashita1, Nobutake Tsuyuno2, Hideto Yoshinari3 and Yujiro Kaneko3 (Yokohama Research Lab., Hitachi Ltd.1, Hitachi Research Lab., Hitachi Ltd.2, Hitachi Automotive Systems, Ltd.3) | |
| 11:15 | Investigation on the Mutual Inductance of On-Chip Transformers | Experimental Study on Thermal Performance of Loop Heat Pipes with Flat Evaporator for LSI Package | ||
| Heng-Ming Hsu, Sih-Han Lai, Meng-Syun Chen and Hsien-Feng Liao (Department of Electrical Engineering, National Chung-Hsing University ) | Takeshi Shioga, Susumu Ogata and Yoshihiro Mizuno (Fujitsu Laboratories LTD.) | |||
| 11:40 | Award ceremony | |||
| Closing | ||||
| 12:00 | Lunch | |||
| 13:00 17:00 |
Systems Packaging Japan Workshop | |||